1. Field of the Invention
The present invention relates to a structure of an integrated circuit (IC) device. More particularly, the present invention relates to a structure of a capacitor set, and to a method for reducing the capacitance variation between capacitors.
2. Description of the Related Art
The capacitor is one of the major devices in integrated circuits. In applications of analog devices, the capacitors usually used include the metal-insulator-metal (MIM) capacitor and the metal-oxide-metal (MOM) capacitor. The fabricating process of a MOM capacitor can be integrated with the interconnect process, hence needing no extra photomask. On the contrary, a MIM capacitor process needs an extra photomask and an extra lithography process, and therefore costs more.
However, the fabricating process of either type of capacitor is easily affected by some variation factors, such as machine wearing and changes in raw materials, so that the capacitances of the capacitors are not uniform causing a relative variation that lowers the product performances. A relative capacitance variation between capacitors generally includes a local capacitance variation of short range and a global capacitance variation of long range. For example, through a capacitance match measurement to two capacitors in the same die, the capacitances of the two capacitors are found to be different causing a capacitance mismatch problem. For two capacitors within a short range, the relative capacitance variation between them is mostly due to the local capacitance variation.
The local capacitance variation usually can be decreased by increasing the area of each capacitor. The reason is given below in reference of FIG. 7, which shows an example of the capacitance of capacitor varying with the position within a short range in the prior art. In FIG. 7, the local capacitance variation between the two positions “a” and “b” is ΔC that is the difference between the capacitances at the two positions, while the local capacitance variation between the two regions A and B is ΔC′ that is the difference between the mean capacitance in the region A and the mean capacitance in the region B and is smaller than ΔC. Accordingly, increasing the capacitor area can effectively lower the local capacitance variation. For MIM capacitors, increasing the capacitor area can effectively decreases the local capacitance variation; for MOM capacitors, however, increasing the capacitor area cannot effectively decreases the local capacitance variation. Moreover, with an increase in the capacitor area, the long-range global capacitance variation is adversely increased, so that the performances of the products are difficult to make uniform.
Accordingly, the statistical capacitance variation between capacitors are a very important issue to the performance of IC products. Hence, for current IC processes, it is much desired to lower the capacitance variations of the capacitors.